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Is it time for a new mezzanine card standard? |
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Written by Ray Alderman
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March 17, 2008
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Any discussion about mezzanine cards requires a recap of some industry history. Back in 1990, there were more than 50 mezzanine specifications in the market. That was problematic. The PMC specifications started with the Institute of Electrical and Electronic Engineers (IEEE), with the S-bus electricals from Sun Microsystems. That migrated to using PCI electricals when PCIbus was announced. Additionally, pinouts were added to support processors, PrPMC. When the high-speed differential-serial fabrics were announced, another connector was added to the PMC specification called XMC (Switched-serial Mezzanine Card). Even with this history, we need to start thinking about a new mezzanine standard for the embedded markets. (continues on vmecritical.com)
Even with this history, we need to start thinking about a new mezzanine standard for the embedded markets. A discussion of mezzanines also requires a review of the markets. The primary users of mezzanine cards include the military and industrial markets. The military market requires a number of different interfaces such as 1553, Fibre Channel, and others on its CPU cards, and it needs the flexibility a mezzanine card offers. Putting certain functions on mezzanine cards also offers the MIL/COTS users a reasonable strategy for chip obsolescence: They can replace the obsolete chip with a new one on a new mezzanine. The industrial markets have even more interfaces to deal with (TTL I/O, opto-isolated I/O lines, A/D and D/A interfaces, motor controllers, and others). Telecoms seem to use mezzanine cards for prototyping and systems development, since they have only a few interfaces required. When a telecom company has the basic configuration completed, tested, and the software written, they expect their board supplier to consolidate the functions from the mezzanine card hard-down onto the CPU card and reduce the cost of the board and the system. (continues on vmecritical.com)
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